TL;DR: Samsung and TSMC committed on September 8, 2026 to use ASML's $400 million High NA EUV machines, while Intel, Samsung, TSMC and ASML agreed to move photomasks from 6 inches to 12 inches to lift output by 40 percent.

On September 8, 2026, the world's three largest advanced chip manufacturers aligned behind one Dutch supplier. Samsung Electronics said it would manufacture memory with High NA extreme ultraviolet lithography by 2028, Taiwan Semiconductor Manufacturing Co. said it would manufacture leading-edge logic with the same class of equipment starting in 2030, and Intel confirmed expanded use after starting high-volume production in July 2026, according to Ars Technica. The three manufacturers plus ASML Holding NV also backed a joint move to replace the long-used 6-inch photomask with a 12-inch photomask, a format change described as raising throughput of High NA tools by 40 percent, according to Ars Technica.

That combined commitment answers two linked questions for United States technology readers: who will use the next generation of chip-printing hardware, and how will the industry make that hardware pay off in the artificial intelligence era. The machines can cost up to $400 million each and are supplied only by ASML, according to Ars Technica. The larger stencil is intended to increase factory productivity, lower manufacturing cost and remove a design constraint called stitching, according to CNBC.

What Samsung, TSMC and Intel committed to on September 8

Samsung, the largest maker of memory chips, said it would deploy High NA EUV for DRAM, a key type of computer memory, from 2028, according to CNBC. TSMC, the leader in contract production of custom processors for customers including AMD, Apple, Nvidia and Qualcomm, said it would deploy High NA for advanced chips starting in 2030, according to Ars Technica. Intel, the United States manufacturer, said it had already introduced High NA EUV into high-volume manufacturing of Panther Lake processors for mobile computing devices starting in July 2026, according to Ars Technica.

The September 8 announcements place Intel first in production use, Samsung second in memory, and TSMC third in leading-edge logic. Intel Foundry processed more than one million wafers using High NA EUV across tool certification and testing, research and development, and volume production on select layers for a subset of its Core Ultra Series 3 processors, code-named Panther Lake, according to reporting summarized by TrendForce. Intel installed the first commercial EXE system in 2024, qualified the latest generation of tools, and shipped the first high-volume logic product manufactured with High NA, according to the same TrendForce summary of ASML's statement.

TSMC said it expects the number of layers requiring High NA EUV to increase as manufacturing nodes advance, according to the TrendForce summary. TSMC linked that increase primarily to increasingly complex transistor architectures required for AI applications, according to CNBC. Samsung said adoption in 2030 would extend the DRAM scaling roadmap and make the process more efficient, according to CNBC.

Investors treated broader adoption as central to ASML's growth outlook. Investors see the success of High NA EUV machines as key to ASML's future growth as the stock looked to extend a 120 percent run over the last year, according to CNBC. Barclays said in a note on Tuesday that the announcements should provide more visibility on adoption which had been a key debate, adding that the news is a positive, according to CNBC. Shares of Amsterdam-listed ASML were flat-to-lower in early trading on Tuesday, according to CNBC.

Why High NA EUV allows smaller chip features

EUV lithography prints circuit patterns onto silicon wafers by directing light through a patterned stencil and optical system, building circuitry layer by layer, according to Ars Technica. Compared with older deep ultraviolet lithography, EUV uses a shorter wavelength to define smaller features on silicon wafers, according to Ars Technica.

The light source itself is unusually demanding. The system uses lasers that repeatedly strike molten tin to create plasma with temperatures around 200,000 degrees C, with mirrors collecting light from the plasma and redirecting it into a bus-size lithography tool for projecting circuitry patterns onto wafers, a design described by ASML researchers for IEEE Spectrum and summarized by Ars Technica. High-numerical-aperture EUV uses bigger mirrors and an improved optical system to more precisely collect and focus light, according to Ars Technica.

That precision is why the technology is linked to next-generation chips for AI data centers and consumer electronics such as smartphones, tablets and laptops, according to Ars Technica. Smaller features can support more powerful and efficient chips, a goal tied directly to AI data-center demand and to memory supply. The rush to construct new AI data centers has contributed to a global shortage of memory chips that has increased the prices of smartphones, laptops and gaming machines, according to Ars Technica.

ASML has said it will add about 30 percent capacity for EUV in total in 2027, according to CNBC. Analysts at Barclays said the announcements give ASML more visibility into planning, according to CNBC. Barclays added that demand is clearly strong and that ASML faces a significant decision on whether to further expand EUV capacity beyond recently expanded targets, according to CNBC.

The 12-inch photomask change and the 40 percent gain

Photomasks are the stencils used to print patterns on wafers, according to CNBC. The industry standard has been 6 inches. The new initiative would transition to large-format 12-inch photomasks, according to reporting summarized by Engadget.

ASML, TSMC, Samsung and Intel agreed to pursue the shift together, according to Ars Technica. South Korean memory maker SK Hynix is also considering joining the industry consortium overseeing the switch to larger photomasks, according to Ars Technica. SK Hynix is also aiming to start making memory chips using High NA EUV technology starting in 2028, according to Ars Technica.

The claimed benefit is large. The shift could eventually improve chipmaking productivity of High NA EUV machines by 40 percent, ASML chief technology officer Marco Pieters told Bloomberg, as summarized by Ars Technica. In a separate interview account, Pieters said that if industry participants complete the work, productivity of those systems will go up by 40 percent, according to Engadget. TSMC said moving to 12-inch masks would boost fab productivity, lower chipmaking costs and eliminate stitching constraints, according to the TrendForce summary.

Stitching refers to joining exposures together when a desired chip area exceeds the exposure field available with current masks. The larger masks would allow companies to print the finer features of the High NA process onto larger chips without stitching, reducing cost and complexity, according to Engadget. The new technology could increase throughput from High NA machines by 40 percent while simplifying the design process, Pieters said, according to the Taipei Times summary of Bloomberg reporting.

Photomasks were described as akin to carved woodblocks used to print the same images repeatedly, except printing with light on silicon wafers, according to the Taipei Times. While a shift to larger masks has long been considered complicated and expensive, the coordinated push offers the possibility of substantial benefits, according to the Taipei Times.

Pilot line in 2031, production use in 2033

The mask transition has a multi-year schedule. TSMC and ASML aim to build a test line to produce 12-inch masks by 2031 as part of a process of having that technique begin use in production with High NA tools by 2033, according to the Taipei Times. Under the roadmap, the partners aim to establish a 12-inch mask pilot line by 2031, paving the way for 12-inch High-NA lithography systems to enter advanced-node production by 2033, according to TrendForce.

High NA EUV will initially enter production using existing 6-inch masks, TSMC said, according to TrendForce. Intel Foundry was cited as an example of delivering value with 6-inch masks while supporting evolution to 6 by 12-inch masks, according to TrendForce. Samsung said it would work closely with industry partners to develop the required mask technologies and supporting infrastructure, according to the Taipei Times.

TSMC Chairman and CEO C.C. Wei said TSMC has always believed in the power of collaboration to overcome technical barriers before they become economic barriers for the semiconductor industry, according to the Taipei Times. That statement frames the mask effort as a shared infrastructure project rather than a single-vendor upgrade.

For United States readers, the dates matter because they define when capacity effects could reach products. Samsung memory use is targeted by 2028, TSMC advanced logic use is targeted starting in 2030, pilot mask work is targeted by 2031, and 12-inch mask production with High NA tools is targeted by 2033, according to the Taipei Times and TrendForce summaries. Both TSMC and Samsung may encounter bottlenecks that affect planned production dates, because scaling the technology has proved demanding in early Intel use, according to Engadget.

How Intel's early use sets the baseline

Intel remains the only foundry identified as having deployed High NA EUV in high-volume manufacturing at the time of the announcements. Intel used the technology in high-volume manufacturing of Panther Lake processors for mobile computing devices starting in July 2026, according to Ars Technica. Currently, High NA EUV technology has only been deployed by Intel on its 18A process for select Core Ultra Series 3 processors known as Panther Lake, according to Engadget.

Intel said in July that it is using High NA EUV technology for advanced chip manufacturing, according to CNBC. The company is also working on an advanced version called 18A-P, under consideration by Apple for its next-generation A-series iPhone processors, according to Engadget. ASML said Intel Foundry has been one of the key leaders in industry adoption of High NA, from installing the first commercial EXE system in 2024 to qualifying the latest generation of tools to shipping the first high-volume logic product manufactured with High NA, according to TrendForce.

That record includes more than one million wafers processed using High NA EUV across certification, testing, research and volume production, according to TrendForce. The figure covers select layers for a subset of Core Ultra Series 3 processors, not every layer of every chip, according to the same summary.

The early Intel work also illustrates why the mask debate matters now. Intel has shown value with current 6-inch masks, while supporting longer-term work on larger masks, according to TrendForce. The larger format is not required to start High NA production, but it is presented as the path to full productivity once chip sizes and AI-driven transistor complexity increase, according to CNBC and TrendForce.

AI demand, memory shortage and the China limits

The announcements arrived during a period of strong AI-related chip demand. TSMC and Samsung committed to using High NA machines as demand grows for more advanced chips, according to CNBC. Samsung and TSMC are the world's number one and two chip manufacturers by relevant volume measures, according to Engadget. TSMC is the leader in producing custom chips for companies including Nvidia and Apple, while Samsung is the leading maker of memory chips, according to the Taipei Times.

Improved production has become a business imperative for as long as AI investment continues to expand, according to Ars Technica. The rush to build AI data centers has been linked to tight memory supply and higher prices for phones, laptops and gaming hardware, according to Ars Technica. Samsung's planned 2028 use for DRAM and SK Hynix's evaluated 2028 use directly target that memory segment, according to Ars Technica and CNBC.

Export controls remain a separate constraint. ASML still supplies Chinese companies like Semiconductor Manufacturing International Corporation with older-generation deep-ultraviolet lithography machines but has been blocked from exporting most of its chipmaking machines to China under Dutch government restrictions and United States political pressure, according to Ars Technica. Despite unproven United States government allegations that China managed to obtain one EUV lithography machine, Chinese companies face difficulty developing a domestic equivalent and supporting supply chain, according to Ars Technica.

Germany's Zeiss Group is the exclusive supplier of the mirrors and optical systems used in ASML machines, according to Ars Technica. An executive at Zeiss recently predicted that China would need 15 years to develop EUV lithography machines, according to Ars Technica. This account was updated on September 8, 2026 to correct the description of EUV technology in comparison with older technologies such as deep ultraviolet lithography, according to Ars Technica.

Sources referenced